941 lines
42 KiB
C
941 lines
42 KiB
C
/*
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* Automatically generated file. DO NOT EDIT.
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* Espressif IoT Development Framework (ESP-IDF) 5.2.1 Configuration Header
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*/
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#pragma once
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#define CONFIG_SOC_MPU_MIN_REGION_SIZE 0x20000000
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#define CONFIG_SOC_MPU_REGIONS_MAX_NUM 8
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#define CONFIG_SOC_ADC_SUPPORTED 1
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#define CONFIG_SOC_UART_SUPPORTED 1
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#define CONFIG_SOC_PCNT_SUPPORTED 1
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#define CONFIG_SOC_WIFI_SUPPORTED 1
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#define CONFIG_SOC_TWAI_SUPPORTED 1
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#define CONFIG_SOC_GDMA_SUPPORTED 1
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#define CONFIG_SOC_AHB_GDMA_SUPPORTED 1
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#define CONFIG_SOC_GPTIMER_SUPPORTED 1
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#define CONFIG_SOC_LCDCAM_SUPPORTED 1
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#define CONFIG_SOC_MCPWM_SUPPORTED 1
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#define CONFIG_SOC_DEDICATED_GPIO_SUPPORTED 1
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#define CONFIG_SOC_CACHE_SUPPORT_WRAP 1
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#define CONFIG_SOC_ULP_SUPPORTED 1
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#define CONFIG_SOC_ULP_FSM_SUPPORTED 1
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#define CONFIG_SOC_RISCV_COPROC_SUPPORTED 1
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#define CONFIG_SOC_BT_SUPPORTED 1
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#define CONFIG_SOC_USB_OTG_SUPPORTED 1
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#define CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED 1
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#define CONFIG_SOC_CCOMP_TIMER_SUPPORTED 1
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#define CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED 1
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#define CONFIG_SOC_SUPPORTS_SECURE_DL_MODE 1
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#define CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD 1
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#define CONFIG_SOC_EFUSE_SUPPORTED 1
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#define CONFIG_SOC_SDMMC_HOST_SUPPORTED 1
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#define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1
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#define CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define CONFIG_SOC_RTC_MEM_SUPPORTED 1
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#define CONFIG_SOC_PSRAM_DMA_CAPABLE 1
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#define CONFIG_SOC_XT_WDT_SUPPORTED 1
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#define CONFIG_SOC_I2S_SUPPORTED 1
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#define CONFIG_SOC_RMT_SUPPORTED 1
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#define CONFIG_SOC_SDM_SUPPORTED 1
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#define CONFIG_SOC_GPSPI_SUPPORTED 1
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#define CONFIG_SOC_LEDC_SUPPORTED 1
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#define CONFIG_SOC_I2C_SUPPORTED 1
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#define CONFIG_SOC_SYSTIMER_SUPPORTED 1
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#define CONFIG_SOC_SUPPORT_COEXISTENCE 1
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#define CONFIG_SOC_TEMP_SENSOR_SUPPORTED 1
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#define CONFIG_SOC_AES_SUPPORTED 1
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#define CONFIG_SOC_MPI_SUPPORTED 1
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#define CONFIG_SOC_SHA_SUPPORTED 1
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#define CONFIG_SOC_HMAC_SUPPORTED 1
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#define CONFIG_SOC_DIG_SIGN_SUPPORTED 1
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#define CONFIG_SOC_FLASH_ENC_SUPPORTED 1
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#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
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#define CONFIG_SOC_MEMPROT_SUPPORTED 1
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#define CONFIG_SOC_TOUCH_SENSOR_SUPPORTED 1
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#define CONFIG_SOC_BOD_SUPPORTED 1
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#define CONFIG_SOC_CLK_TREE_SUPPORTED 1
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#define CONFIG_SOC_MPU_SUPPORTED 1
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#define CONFIG_SOC_WDT_SUPPORTED 1
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#define CONFIG_SOC_SPI_FLASH_SUPPORTED 1
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#define CONFIG_SOC_XTAL_SUPPORT_40M 1
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#define CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG 1
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#define CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED 1
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#define CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED 1
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#define CONFIG_SOC_ADC_ARBITER_SUPPORTED 1
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#define CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
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#define CONFIG_SOC_ADC_MONITOR_SUPPORTED 1
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#define CONFIG_SOC_ADC_DMA_SUPPORTED 1
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#define CONFIG_SOC_ADC_PERIPH_NUM 2
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#define CONFIG_SOC_ADC_MAX_CHANNEL_NUM 10
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#define CONFIG_SOC_ADC_ATTEN_NUM 4
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#define CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM 2
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#define CONFIG_SOC_ADC_PATT_LEN_MAX 24
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#define CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH 12
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#define CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH 12
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#define CONFIG_SOC_ADC_DIGI_RESULT_BYTES 4
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#define CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV 4
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#define CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM 2
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#define CONFIG_SOC_ADC_DIGI_MONITOR_NUM 2
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#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
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#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
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#define CONFIG_SOC_ADC_RTC_MIN_BITWIDTH 12
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#define CONFIG_SOC_ADC_RTC_MAX_BITWIDTH 12
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#define CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED 1
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#define CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED 1
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#define CONFIG_SOC_ADC_SHARED_POWER 1
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#define CONFIG_SOC_APB_BACKUP_DMA 1
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#define CONFIG_SOC_BROWNOUT_RESET_SUPPORTED 1
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#define CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED 1
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#define CONFIG_SOC_CACHE_FREEZE_SUPPORTED 1
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#define CONFIG_SOC_CPU_CORES_NUM 2
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#define CONFIG_SOC_CPU_INTR_NUM 32
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#define CONFIG_SOC_CPU_HAS_FPU 1
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#define CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES 1
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#define CONFIG_SOC_CPU_BREAKPOINTS_NUM 2
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#define CONFIG_SOC_CPU_WATCHPOINTS_NUM 2
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#define CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64
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#define CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN 4096
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#define CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH 16
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#define CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US 1100
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#define CONFIG_SOC_AHB_GDMA_VERSION 1
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#define CONFIG_SOC_GDMA_NUM_GROUPS_MAX 1
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#define CONFIG_SOC_GDMA_PAIRS_PER_GROUP 5
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#define CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX 5
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#define CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM 1
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#define CONFIG_SOC_GPIO_PORT 1
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#define CONFIG_SOC_GPIO_PIN_COUNT 49
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#define CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
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#define CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB 1
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#define CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT 1
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#define CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD 1
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#define CONFIG_SOC_GPIO_VALID_GPIO_MASK 0x1FFFFFFFFFFFF
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#define CONFIG_SOC_GPIO_IN_RANGE_MAX 48
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#define CONFIG_SOC_GPIO_OUT_RANGE_MAX 48
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#define CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0001FFFFFC000000
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#define CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX 1
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#define CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM 8
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#define CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM 8
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#define CONFIG_SOC_DEDIC_GPIO_OUT_AUTO_ENABLE 1
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#define CONFIG_SOC_I2C_NUM 2
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#define CONFIG_SOC_I2C_FIFO_LEN 32
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#define CONFIG_SOC_I2C_CMD_REG_NUM 8
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#define CONFIG_SOC_I2C_SUPPORT_SLAVE 1
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#define CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS 1
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#define CONFIG_SOC_I2C_SUPPORT_XTAL 1
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#define CONFIG_SOC_I2C_SUPPORT_RTC 1
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#define CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR 1
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#define CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST 1
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#define CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS 1
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#define CONFIG_SOC_I2S_NUM 2
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#define CONFIG_SOC_I2S_HW_VERSION_2 1
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#define CONFIG_SOC_I2S_SUPPORTS_XTAL 1
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#define CONFIG_SOC_I2S_SUPPORTS_PLL_F160M 1
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#define CONFIG_SOC_I2S_SUPPORTS_PCM 1
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#define CONFIG_SOC_I2S_SUPPORTS_PDM 1
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#define CONFIG_SOC_I2S_SUPPORTS_PDM_TX 1
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#define CONFIG_SOC_I2S_PDM_MAX_TX_LINES 2
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#define CONFIG_SOC_I2S_SUPPORTS_PDM_RX 1
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#define CONFIG_SOC_I2S_PDM_MAX_RX_LINES 4
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#define CONFIG_SOC_I2S_SUPPORTS_TDM 1
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#define CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK 1
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#define CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK 1
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#define CONFIG_SOC_LEDC_CHANNEL_NUM 8
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#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 14
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#define CONFIG_SOC_LEDC_SUPPORT_FADE_STOP 1
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#define CONFIG_SOC_MCPWM_GROUPS 2
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#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP 1
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#define CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER 3
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#define CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE 1
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#define CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM 1
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#define CONFIG_SOC_MMU_PERIPH_NUM 1
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#define CONFIG_SOC_PCNT_GROUPS 1
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#define CONFIG_SOC_PCNT_UNITS_PER_GROUP 4
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#define CONFIG_SOC_PCNT_CHANNELS_PER_UNIT 2
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#define CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT 2
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#define CONFIG_SOC_RMT_GROUPS 1
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#define CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP 4
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#define CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP 4
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#define CONFIG_SOC_RMT_CHANNELS_PER_GROUP 8
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#define CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL 48
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#define CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG 1
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#define CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION 1
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#define CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP 1
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#define CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT 1
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#define CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1
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#define CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO 1
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#define CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1
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#define CONFIG_SOC_RMT_SUPPORT_XTAL 1
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#define CONFIG_SOC_RMT_SUPPORT_RC_FAST 1
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#define CONFIG_SOC_RMT_SUPPORT_APB 1
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#define CONFIG_SOC_RMT_SUPPORT_DMA 1
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#define CONFIG_SOC_LCD_I80_SUPPORTED 1
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#define CONFIG_SOC_LCD_RGB_SUPPORTED 1
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#define CONFIG_SOC_LCD_I80_BUSES 1
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#define CONFIG_SOC_LCD_RGB_PANELS 1
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#define CONFIG_SOC_LCD_I80_BUS_WIDTH 16
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#define CONFIG_SOC_LCD_RGB_DATA_WIDTH 16
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#define CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV 1
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#define CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH 128
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#define CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM 549
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#define CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH 128
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#define CONFIG_SOC_RTCIO_PIN_COUNT 22
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#define CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1
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#define CONFIG_SOC_RTCIO_HOLD_SUPPORTED 1
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#define CONFIG_SOC_RTCIO_WAKE_SUPPORTED 1
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#define CONFIG_SOC_SDM_GROUPS 1
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#define CONFIG_SOC_SDM_CHANNELS_PER_GROUP 8
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#define CONFIG_SOC_SDM_CLK_SUPPORT_APB 1
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#define CONFIG_SOC_SPI_PERIPH_NUM 3
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#define CONFIG_SOC_SPI_MAX_CS_NUM 6
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#define CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE 64
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#define CONFIG_SOC_SPI_SUPPORT_DDRCLK 1
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#define CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
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#define CONFIG_SOC_SPI_SUPPORT_CD_SIG 1
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#define CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1
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#define CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2 1
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#define CONFIG_SOC_SPI_SUPPORT_CLK_APB 1
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#define CONFIG_SOC_SPI_SUPPORT_CLK_XTAL 1
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#define CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT 1
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#define CONFIG_SOC_MEMSPI_IS_INDEPENDENT 1
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#define CONFIG_SOC_SPI_MAX_PRE_DIVIDER 16
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#define CONFIG_SOC_SPI_SUPPORT_OCT 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_120M 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
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#define CONFIG_SOC_SPIRAM_SUPPORTED 1
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#define CONFIG_SOC_SPIRAM_XIP_SUPPORTED 1
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#define CONFIG_SOC_SYSTIMER_COUNTER_NUM 2
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#define CONFIG_SOC_SYSTIMER_ALARM_NUM 3
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#define CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO 32
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#define CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI 20
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#define CONFIG_SOC_SYSTIMER_FIXED_DIVIDER 1
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#define CONFIG_SOC_SYSTIMER_INT_LEVEL 1
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#define CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE 1
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#define CONFIG_SOC_TIMER_GROUPS 2
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#define CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP 2
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#define CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH 54
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#define CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL 1
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#define CONFIG_SOC_TIMER_GROUP_SUPPORT_APB 1
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#define CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS 4
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#define CONFIG_SOC_TOUCH_VERSION_2 1
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#define CONFIG_SOC_TOUCH_SENSOR_NUM 15
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#define CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM 3
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#define CONFIG_SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED 1
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#define CONFIG_SOC_TOUCH_PAD_THRESHOLD_MAX 0x1FFFFF
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#define CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX 0xFF
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#define CONFIG_SOC_TWAI_CONTROLLER_NUM 1
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#define CONFIG_SOC_TWAI_CLK_SUPPORT_APB 1
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#define CONFIG_SOC_TWAI_BRP_MIN 2
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#define CONFIG_SOC_TWAI_BRP_MAX 16384
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#define CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS 1
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#define CONFIG_SOC_UART_NUM 3
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#define CONFIG_SOC_UART_HP_NUM 3
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#define CONFIG_SOC_UART_FIFO_LEN 128
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#define CONFIG_SOC_UART_BITRATE_MAX 5000000
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#define CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND 1
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#define CONFIG_SOC_UART_SUPPORT_WAKEUP_INT 1
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#define CONFIG_SOC_UART_SUPPORT_APB_CLK 1
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#define CONFIG_SOC_UART_SUPPORT_RTC_CLK 1
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#define CONFIG_SOC_UART_SUPPORT_XTAL_CLK 1
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#define CONFIG_SOC_USB_OTG_PERIPH_NUM 1
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#define CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE 3968
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#define CONFIG_SOC_SHA_SUPPORT_DMA 1
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#define CONFIG_SOC_SHA_SUPPORT_RESUME 1
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#define CONFIG_SOC_SHA_GDMA 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA1 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA224 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA256 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA384 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA512 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA512_224 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA512_256 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA512_T 1
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#define CONFIG_SOC_MPI_MEM_BLOCKS_NUM 4
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#define CONFIG_SOC_MPI_OPERATIONS_NUM 3
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#define CONFIG_SOC_RSA_MAX_BIT_LEN 4096
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#define CONFIG_SOC_AES_SUPPORT_DMA 1
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#define CONFIG_SOC_AES_GDMA 1
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#define CONFIG_SOC_AES_SUPPORT_AES_128 1
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#define CONFIG_SOC_AES_SUPPORT_AES_256 1
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#define CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_BT_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_CPU_PD 1
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#define CONFIG_SOC_PM_SUPPORT_TAGMEM_PD 1
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#define CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD 1
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#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
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#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
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#define CONFIG_SOC_PM_SUPPORT_MAC_BB_PD 1
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#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
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#define CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED 1
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#define CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY 1
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#define CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL 1
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#define CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA 1
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#define CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED 1
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#define CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 1
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#define CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION 1
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#define CONFIG_SOC_CLK_XTAL32K_SUPPORTED 1
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#define CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1
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#define CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE 1
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#define CONFIG_SOC_EFUSE_HARD_DIS_JTAG 1
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#define CONFIG_SOC_EFUSE_DIS_USB_JTAG 1
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#define CONFIG_SOC_EFUSE_SOFT_DIS_JTAG 1
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#define CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define CONFIG_SOC_EFUSE_DIS_ICACHE 1
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#define CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1
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#define CONFIG_SOC_SECURE_BOOT_V2_RSA 1
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#define CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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#define CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
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#define CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY 1
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#define CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX 64
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#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES 1
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#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS 1
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#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128 1
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#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256 1
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#define CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE 16
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#define CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE 256
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#define CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE 21
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#define CONFIG_SOC_MAC_BB_PD_MEM_SIZE 192
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#define CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH 12
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#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_OPI_MODE 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_WRAP 1
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#define CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY 1
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#define CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM 1
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#define CONFIG_SOC_COEX_HW_PTI 1
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#define CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE 1
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#define CONFIG_SOC_SDMMC_USE_GPIO_MATRIX 1
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#define CONFIG_SOC_SDMMC_NUM_SLOTS 2
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#define CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK 1
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#define CONFIG_SOC_SDMMC_DELAY_PHASE_NUM 4
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#define CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC 1
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#define CONFIG_SOC_WIFI_HW_TSF 1
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#define CONFIG_SOC_WIFI_FTM_SUPPORT 1
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#define CONFIG_SOC_WIFI_GCMP_SUPPORT 1
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#define CONFIG_SOC_WIFI_WAPI_SUPPORT 1
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#define CONFIG_SOC_WIFI_CSI_SUPPORT 1
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#define CONFIG_SOC_WIFI_MESH_SUPPORT 1
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#define CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW 1
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#define CONFIG_SOC_BLE_SUPPORTED 1
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#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
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#define CONFIG_SOC_BLE_50_SUPPORTED 1
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#define CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED 1
|
|
#define CONFIG_SOC_BLUFI_SUPPORTED 1
|
|
#define CONFIG_SOC_ULP_HAS_ADC 1
|
|
#define CONFIG_SOC_PHY_COMBO_MODULE 1
|
|
#define CONFIG_IDF_CMAKE 1
|
|
#define CONFIG_IDF_TOOLCHAIN "gcc"
|
|
#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
|
|
#define CONFIG_IDF_TARGET_ARCH "xtensa"
|
|
#define CONFIG_IDF_TARGET "esp32s3"
|
|
#define CONFIG_IDF_INIT_VERSION "5.2.1"
|
|
#define CONFIG_IDF_TARGET_ESP32S3 1
|
|
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
|
|
#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
|
|
#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
|
|
#define CONFIG_APP_BUILD_BOOTLOADER 1
|
|
#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
|
|
#define CONFIG_BOOTLOADER_COMPILE_TIME_DATE 1
|
|
#define CONFIG_BOOTLOADER_PROJECT_VER 1
|
|
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
|
|
#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
|
|
#define CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE 1
|
|
#define CONFIG_BOOTLOADER_LOG_LEVEL 5
|
|
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
|
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
|
|
#define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
|
|
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
|
|
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
|
|
#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
|
|
#define CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED 1
|
|
#define CONFIG_SECURE_BOOT_V2_PREFERRED 1
|
|
#define CONFIG_SECURE_ROM_DL_MODE_ENABLED 1
|
|
#define CONFIG_APP_COMPILE_TIME_DATE 1
|
|
#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
|
|
#define CONFIG_ESP_ROM_HAS_CRC_LE 1
|
|
#define CONFIG_ESP_ROM_HAS_CRC_BE 1
|
|
#define CONFIG_ESP_ROM_HAS_MZ_CRC32 1
|
|
#define CONFIG_ESP_ROM_HAS_JPEG_DECODE 1
|
|
#define CONFIG_ESP_ROM_UART_CLK_IS_XTAL 1
|
|
#define CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING 1
|
|
#define CONFIG_ESP_ROM_USB_OTG_NUM 3
|
|
#define CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM 4
|
|
#define CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG 1
|
|
#define CONFIG_ESP_ROM_GET_CLK_FREQ 1
|
|
#define CONFIG_ESP_ROM_HAS_HAL_WDT 1
|
|
#define CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND 1
|
|
#define CONFIG_ESP_ROM_HAS_LAYOUT_TABLE 1
|
|
#define CONFIG_ESP_ROM_HAS_SPI_FLASH 1
|
|
#define CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG 1
|
|
#define CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT 1
|
|
#define CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE 1
|
|
#define CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT 1
|
|
#define CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG 1
|
|
#define CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG 1
|
|
#define CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG 1
|
|
#define CONFIG_ESP_ROM_HAS_SW_FLOAT 1
|
|
#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
|
|
#define CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT 1
|
|
#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
|
|
#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
|
|
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
|
|
#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
|
|
#define CONFIG_ESPTOOLPY_FLASHFREQ_80M_DEFAULT 1
|
|
#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
|
|
#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
|
|
#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
|
|
#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
|
|
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
|
|
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
|
|
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
|
|
#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
|
|
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
|
|
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
|
|
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
|
|
#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
|
|
#define CONFIG_PARTITION_TABLE_MD5 1
|
|
#define CONFIG_COMPILER_OPTIMIZATION_DEBUG 1
|
|
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
|
|
#define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1
|
|
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
|
|
#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
|
|
#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
|
|
#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 1024
|
|
#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
|
|
#define CONFIG_COMPILER_RT_LIB_GCCLIB 1
|
|
#define CONFIG_COMPILER_RT_LIB_NAME "gcc"
|
|
#define CONFIG_APPTRACE_DEST_NONE 1
|
|
#define CONFIG_APPTRACE_DEST_UART_NONE 1
|
|
#define CONFIG_APPTRACE_UART_TASK_PRIO 1
|
|
#define CONFIG_APPTRACE_LOCK_ENABLE 1
|
|
#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
|
|
#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
|
|
#define CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM 1
|
|
#define CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM 1
|
|
#define CONFIG_EFUSE_MAX_BLK_LEN 256
|
|
#define CONFIG_ESP_TLS_USING_MBEDTLS 1
|
|
#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
|
|
#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
|
|
#define CONFIG_ETH_ENABLED 1
|
|
#define CONFIG_ETH_USE_SPI_ETHERNET 1
|
|
#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
|
|
#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
|
|
#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
|
|
#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
|
|
#define CONFIG_HTTPD_MAX_URI_LEN 512
|
|
#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
|
|
#define CONFIG_HTTPD_PURGE_BUF_LEN 32
|
|
#define CONFIG_ESP32S3_REV_MIN_0 1
|
|
#define CONFIG_ESP32S3_REV_MIN_FULL 0
|
|
#define CONFIG_ESP_REV_MIN_FULL 0
|
|
#define CONFIG_ESP32S3_REV_MAX_FULL 99
|
|
#define CONFIG_ESP_REV_MAX_FULL 99
|
|
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
|
|
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
|
|
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
|
|
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH 1
|
|
#define CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR 1
|
|
#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR 1
|
|
#define CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES 4
|
|
#define CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND 1
|
|
#define CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU 1
|
|
#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
|
|
#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1
|
|
#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 2000
|
|
#define CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS 1
|
|
#define CONFIG_RTC_CLK_SRC_INT_RC 1
|
|
#define CONFIG_RTC_CLK_CAL_CYCLES 1024
|
|
#define CONFIG_PERIPH_CTRL_FUNC_IN_IRAM 1
|
|
#define CONFIG_XTAL_FREQ_40 1
|
|
#define CONFIG_XTAL_FREQ 40
|
|
#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
|
|
#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
|
|
#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
|
|
#define CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API 1
|
|
#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
|
|
#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
|
|
#define CONFIG_ESP_PHY_MAX_TX_POWER 20
|
|
#define CONFIG_ESP_PHY_ENABLE_USB 1
|
|
#define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
|
|
#define CONFIG_ESP_PHY_CALIBRATION_MODE 0
|
|
#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
|
|
#define CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP 1
|
|
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1
|
|
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
|
|
#define CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB 1
|
|
#define CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE 0x4000
|
|
#define CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS 1
|
|
#define CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS 8
|
|
#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B 1
|
|
#define CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 32
|
|
#define CONFIG_ESP32S3_DATA_CACHE_32KB 1
|
|
#define CONFIG_ESP32S3_DATA_CACHE_SIZE 0x8000
|
|
#define CONFIG_ESP32S3_DATA_CACHE_8WAYS 1
|
|
#define CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS 8
|
|
#define CONFIG_ESP32S3_DATA_CACHE_LINE_32B 1
|
|
#define CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE 32
|
|
#define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0
|
|
#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
|
|
#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
|
|
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
|
|
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
|
|
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
|
|
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
|
|
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
|
|
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2304
|
|
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 3584
|
|
#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
|
|
#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
|
|
#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
|
|
#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
|
|
#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
|
|
#define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED 1
|
|
#define CONFIG_ESP_CONSOLE_UART 1
|
|
#define CONFIG_ESP_CONSOLE_UART_NUM 0
|
|
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
|
|
#define CONFIG_ESP_INT_WDT 1
|
|
#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
|
|
#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
|
|
#define CONFIG_ESP_TASK_WDT_EN 1
|
|
#define CONFIG_ESP_TASK_WDT_INIT 1
|
|
#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
|
|
#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
|
|
#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
|
|
#define CONFIG_ESP_DEBUG_OCDAWARE 1
|
|
#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
|
|
#define CONFIG_ESP_BROWNOUT_DET 1
|
|
#define CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 1
|
|
#define CONFIG_ESP_BROWNOUT_DET_LVL 7
|
|
#define CONFIG_ESP_SYSTEM_BROWNOUT_INTR 1
|
|
#define CONFIG_ESP_SYSTEM_BBPLL_RECALIB 1
|
|
#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1280
|
|
#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
|
|
#define CONFIG_ESP_IPC_ISR_ENABLE 1
|
|
#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
|
|
#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
|
|
#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584
|
|
#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
|
|
#define CONFIG_ESP_TIMER_TASK_AFFINITY 0x0
|
|
#define CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0 1
|
|
#define CONFIG_ESP_TIMER_ISR_AFFINITY 0x1
|
|
#define CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0 1
|
|
#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
|
|
#define CONFIG_ESP_WIFI_ENABLED 1
|
|
#define CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM 10
|
|
#define CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM 32
|
|
#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER 1
|
|
#define CONFIG_ESP_WIFI_TX_BUFFER_TYPE 1
|
|
#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM 32
|
|
#define CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER 1
|
|
#define CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF 0
|
|
#define CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF 5
|
|
#define CONFIG_ESP_WIFI_AMPDU_TX_ENABLED 1
|
|
#define CONFIG_ESP_WIFI_TX_BA_WIN 6
|
|
#define CONFIG_ESP_WIFI_AMPDU_RX_ENABLED 1
|
|
#define CONFIG_ESP_WIFI_RX_BA_WIN 6
|
|
#define CONFIG_ESP_WIFI_NVS_ENABLED 1
|
|
#define CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 1
|
|
#define CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN 752
|
|
#define CONFIG_ESP_WIFI_MGMT_SBUF_NUM 32
|
|
#define CONFIG_ESP_WIFI_IRAM_OPT 1
|
|
#define CONFIG_ESP_WIFI_RX_IRAM_OPT 1
|
|
#define CONFIG_ESP_WIFI_ENABLE_WPA3_SAE 1
|
|
#define CONFIG_ESP_WIFI_ENABLE_SAE_PK 1
|
|
#define CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT 1
|
|
#define CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA 1
|
|
#define CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE 1
|
|
#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
|
|
#define CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM 7
|
|
#define CONFIG_ESP_WIFI_MBEDTLS_CRYPTO 1
|
|
#define CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT 1
|
|
#define CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT 1
|
|
#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
|
|
#define CONFIG_FATFS_VOLUME_COUNT 2
|
|
#define CONFIG_FATFS_LFN_NONE 1
|
|
#define CONFIG_FATFS_SECTOR_4096 1
|
|
#define CONFIG_FATFS_CODEPAGE_437 1
|
|
#define CONFIG_FATFS_CODEPAGE 437
|
|
#define CONFIG_FATFS_FS_LOCK 0
|
|
#define CONFIG_FATFS_TIMEOUT_MS 10000
|
|
#define CONFIG_FATFS_PER_FILE_CACHE 1
|
|
#define CONFIG_FATFS_VFS_FSTAT_BLKSIZE 0
|
|
#define CONFIG_FREERTOS_HZ 100
|
|
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
|
|
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
|
|
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
|
|
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
|
|
#define CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME "Tmr Svc"
|
|
#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
|
|
#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
|
|
#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
|
|
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
|
|
#define CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES 1
|
|
#define CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER 1
|
|
#define CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS 1
|
|
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
|
|
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
|
|
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
|
|
#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
|
|
#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
|
|
#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
|
|
#define CONFIG_FREERTOS_PORT 1
|
|
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
|
|
#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
|
|
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
|
|
#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
|
|
#define CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH 1
|
|
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
|
|
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
|
|
#define CONFIG_HAL_WDT_USE_ROM_IMPL 1
|
|
#define CONFIG_HAL_SPI_MASTER_FUNC_IN_IRAM 1
|
|
#define CONFIG_HAL_SPI_SLAVE_FUNC_IN_IRAM 1
|
|
#define CONFIG_HEAP_POISONING_DISABLED 1
|
|
#define CONFIG_HEAP_TRACING_OFF 1
|
|
#define CONFIG_LOG_DEFAULT_LEVEL_VERBOSE 1
|
|
#define CONFIG_LOG_DEFAULT_LEVEL 5
|
|
#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
|
|
#define CONFIG_LOG_MAXIMUM_LEVEL 5
|
|
#define CONFIG_LOG_COLORS 1
|
|
#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
|
|
#define CONFIG_LWIP_ENABLE 1
|
|
#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
|
|
#define CONFIG_LWIP_TCPIP_TASK_PRIO 18
|
|
#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
|
|
#define CONFIG_LWIP_TIMERS_ONDEMAND 1
|
|
#define CONFIG_LWIP_ND6 1
|
|
#define CONFIG_LWIP_MAX_SOCKETS 10
|
|
#define CONFIG_LWIP_SO_REUSE 1
|
|
#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
|
|
#define CONFIG_LWIP_IP_DEFAULT_TTL 64
|
|
#define CONFIG_LWIP_IP4_FRAG 1
|
|
#define CONFIG_LWIP_IP6_FRAG 1
|
|
#define CONFIG_LWIP_IP_REASS_MAX_PBUFS 10
|
|
#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
|
|
#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
|
|
#define CONFIG_LWIP_ESP_MLDV6_REPORT 1
|
|
#define CONFIG_LWIP_MLDV6_TMR_INTERVAL 40
|
|
#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
|
|
#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
|
|
#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
|
|
#define CONFIG_LWIP_DHCP_OPTIONS_LEN 68
|
|
#define CONFIG_LWIP_NUM_NETIF_CLIENT_DATA 0
|
|
#define CONFIG_LWIP_DHCP_COARSE_TIMER_SECS 1
|
|
#define CONFIG_LWIP_DHCPS 1
|
|
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
|
|
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
|
|
#define CONFIG_LWIP_DHCPS_STATIC_ENTRIES 1
|
|
#define CONFIG_LWIP_IPV4 1
|
|
#define CONFIG_LWIP_IPV6 1
|
|
#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
|
|
#define CONFIG_LWIP_NETIF_LOOPBACK 1
|
|
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
|
|
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
|
|
#define CONFIG_LWIP_MAX_LISTENING_TCP 16
|
|
#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
|
|
#define CONFIG_LWIP_TCP_MAXRTX 12
|
|
#define CONFIG_LWIP_TCP_SYNMAXRTX 12
|
|
#define CONFIG_LWIP_TCP_MSS 1440
|
|
#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
|
|
#define CONFIG_LWIP_TCP_MSL 60000
|
|
#define CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT 20000
|
|
#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
|
|
#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
|
|
#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
|
|
#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
|
|
#define CONFIG_LWIP_TCP_OOSEQ_TIMEOUT 6
|
|
#define CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS 4
|
|
#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
|
|
#define CONFIG_LWIP_TCP_RTO_TIME 1500
|
|
#define CONFIG_LWIP_MAX_UDP_PCBS 16
|
|
#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
|
|
#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
|
|
#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 3072
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|
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
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|
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x7FFFFFFF
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#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
|
|
#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
|
|
#define CONFIG_LWIP_ICMP 1
|
|
#define CONFIG_LWIP_MAX_RAW_PCBS 16
|
|
#define CONFIG_LWIP_SNTP_MAX_SERVERS 1
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|
#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
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|
#define CONFIG_LWIP_DNS_MAX_SERVERS 3
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|
#define CONFIG_LWIP_BRIDGEIF_MAX_PORTS 7
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|
#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
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|
#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
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|
#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
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|
#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
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|
#define CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE 1
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|
#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
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|
#define CONFIG_LWIP_HOOK_IP6_INPUT_NONE 1
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|
#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
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|
#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
|
|
#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
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|
#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
|
|
#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
|
|
#define CONFIG_MBEDTLS_PKCS7_C 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS 200
|
|
#define CONFIG_MBEDTLS_CMAC_C 1
|
|
#define CONFIG_MBEDTLS_HARDWARE_AES 1
|
|
#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
|
|
#define CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL 0
|
|
#define CONFIG_MBEDTLS_HARDWARE_MPI 1
|
|
#define CONFIG_MBEDTLS_MPI_USE_INTERRUPT 1
|
|
#define CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL 0
|
|
#define CONFIG_MBEDTLS_HARDWARE_SHA 1
|
|
#define CONFIG_MBEDTLS_ROM_MD5 1
|
|
#define CONFIG_MBEDTLS_HAVE_TIME 1
|
|
#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
|
|
#define CONFIG_MBEDTLS_SHA512_C 1
|
|
#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
|
|
#define CONFIG_MBEDTLS_TLS_SERVER 1
|
|
#define CONFIG_MBEDTLS_TLS_CLIENT 1
|
|
#define CONFIG_MBEDTLS_TLS_ENABLED 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
|
|
#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
|
|
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
|
|
#define CONFIG_MBEDTLS_SSL_ALPN 1
|
|
#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
|
|
#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
|
|
#define CONFIG_MBEDTLS_AES_C 1
|
|
#define CONFIG_MBEDTLS_CCM_C 1
|
|
#define CONFIG_MBEDTLS_GCM_C 1
|
|
#define CONFIG_MBEDTLS_PEM_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_PEM_WRITE_C 1
|
|
#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_ECP_C 1
|
|
#define CONFIG_MBEDTLS_ECDH_C 1
|
|
#define CONFIG_MBEDTLS_ECDSA_C 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
|
|
#define CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM 1
|
|
#define CONFIG_MQTT_PROTOCOL_311 1
|
|
#define CONFIG_MQTT_TRANSPORT_SSL 1
|
|
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
|
|
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
|
|
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
|
|
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
|
|
#define CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT 1
|
|
#define CONFIG_OPENTHREAD_NETWORK_NAME "OpenThread-ESP"
|
|
#define CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX "fd00:db8:a0:0::/64"
|
|
#define CONFIG_OPENTHREAD_NETWORK_CHANNEL 15
|
|
#define CONFIG_OPENTHREAD_NETWORK_PANID 0x1234
|
|
#define CONFIG_OPENTHREAD_NETWORK_EXTPANID "dead00beef00cafe"
|
|
#define CONFIG_OPENTHREAD_NETWORK_MASTERKEY "00112233445566778899aabbccddeeff"
|
|
#define CONFIG_OPENTHREAD_NETWORK_PSKC "104810e2315100afd6bc9215a6bfac53"
|
|
#define CONFIG_OPENTHREAD_XTAL_ACCURACY 130
|
|
#define CONFIG_OPENTHREAD_RX_ON_WHEN_IDLE 1
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0 1
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1 1
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2 1
|
|
#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
|
|
#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
|
|
#define CONFIG_PTHREAD_STACK_MIN 768
|
|
#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
|
|
#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
|
|
#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
|
|
#define CONFIG_MMU_PAGE_SIZE_64KB 1
|
|
#define CONFIG_MMU_PAGE_MODE "64KB"
|
|
#define CONFIG_MMU_PAGE_SIZE 0x10000
|
|
#define CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC 1
|
|
#define CONFIG_SPI_FLASH_BROWNOUT_RESET 1
|
|
#define CONFIG_SPI_FLASH_HPM_AUTO 1
|
|
#define CONFIG_SPI_FLASH_HPM_ON 1
|
|
#define CONFIG_SPI_FLASH_HPM_DC_AUTO 1
|
|
#define CONFIG_SPI_FLASH_SUSPEND_QVL_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
|
|
#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
|
|
#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
|
|
#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
|
|
#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
|
|
#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
|
|
#define CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_TH_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
|
|
#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
|
|
#define CONFIG_SPIFFS_MAX_PARTITIONS 3
|
|
#define CONFIG_SPIFFS_CACHE 1
|
|
#define CONFIG_SPIFFS_CACHE_WR 1
|
|
#define CONFIG_SPIFFS_PAGE_CHECK 1
|
|
#define CONFIG_SPIFFS_GC_MAX_RUNS 10
|
|
#define CONFIG_SPIFFS_PAGE_SIZE 256
|
|
#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
|
|
#define CONFIG_SPIFFS_USE_MAGIC 1
|
|
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
|
|
#define CONFIG_SPIFFS_META_LENGTH 4
|
|
#define CONFIG_SPIFFS_USE_MTIME 1
|
|
#define CONFIG_WS_TRANSPORT 1
|
|
#define CONFIG_WS_BUFFER_SIZE 1024
|
|
#define CONFIG_UNITY_ENABLE_FLOAT 1
|
|
#define CONFIG_UNITY_ENABLE_DOUBLE 1
|
|
#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
|
|
#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
|
|
#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
|
|
#define CONFIG_USB_HOST_DEBOUNCE_DELAY_MS 250
|
|
#define CONFIG_USB_HOST_RESET_HOLD_MS 30
|
|
#define CONFIG_USB_HOST_RESET_RECOVERY_MS 30
|
|
#define CONFIG_USB_HOST_SET_ADDR_RECOVERY_MS 10
|
|
#define CONFIG_USB_OTG_SUPPORTED 1
|
|
#define CONFIG_VFS_SUPPORT_IO 1
|
|
#define CONFIG_VFS_SUPPORT_DIR 1
|
|
#define CONFIG_VFS_SUPPORT_SELECT 1
|
|
#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
|
|
#define CONFIG_VFS_SUPPORT_TERMIOS 1
|
|
#define CONFIG_VFS_MAX_COUNT 8
|
|
#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
|
|
#define CONFIG_WL_SECTOR_SIZE_4096 1
|
|
#define CONFIG_WL_SECTOR_SIZE 4096
|
|
#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
|
|
#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
|
|
#define CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN 1
|
|
|
|
/* List of deprecated options */
|
|
#define CONFIG_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
|
|
#define CONFIG_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
|
|
#define CONFIG_BROWNOUT_DET_LVL_SEL_7 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
|
|
#define CONFIG_COMPILER_OPTIMIZATION_DEFAULT CONFIG_COMPILER_OPTIMIZATION_DEBUG
|
|
#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEBUG
|
|
#define CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART
|
|
#define CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE
|
|
#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
|
|
#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
|
|
#define CONFIG_CXX_EXCEPTIONS CONFIG_COMPILER_CXX_EXCEPTIONS
|
|
#define CONFIG_CXX_EXCEPTIONS_EMG_POOL_SIZE CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE
|
|
#define CONFIG_ESP32S3_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
|
|
#define CONFIG_ESP32S3_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
|
|
#define CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
|
|
#define CONFIG_ESP32S3_DEBUG_OCDAWARE CONFIG_ESP_DEBUG_OCDAWARE
|
|
#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
|
|
#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
|
|
#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
|
|
#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
|
|
#define CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
|
|
#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
|
|
#define CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
|
|
#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
|
|
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE CONFIG_APPTRACE_LOCK_ENABLE
|
|
#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
|
|
#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
|
|
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
|
|
#define CONFIG_ESP32_PHY_MAX_TX_POWER CONFIG_ESP_PHY_MAX_TX_POWER
|
|
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
|
|
#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
|
|
#define CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT CONFIG_PTHREAD_TASK_CORE_DEFAULT
|
|
#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
|
|
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
|
|
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
|
|
#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED CONFIG_ESP_WIFI_AMPDU_RX_ENABLED
|
|
#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED CONFIG_ESP_WIFI_AMPDU_TX_ENABLED
|
|
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM
|
|
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER
|
|
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM
|
|
#define CONFIG_ESP32_WIFI_ENABLED CONFIG_ESP_WIFI_ENABLED
|
|
#define CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA
|
|
#define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE CONFIG_ESP_WIFI_ENABLE_WPA3_SAE
|
|
#define CONFIG_ESP32_WIFI_IRAM_OPT CONFIG_ESP_WIFI_IRAM_OPT
|
|
#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM CONFIG_ESP_WIFI_MGMT_SBUF_NUM
|
|
#define CONFIG_ESP32_WIFI_NVS_ENABLED CONFIG_ESP_WIFI_NVS_ENABLED
|
|
#define CONFIG_ESP32_WIFI_RX_BA_WIN CONFIG_ESP_WIFI_RX_BA_WIN
|
|
#define CONFIG_ESP32_WIFI_RX_IRAM_OPT CONFIG_ESP_WIFI_RX_IRAM_OPT
|
|
#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN
|
|
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM
|
|
#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0
|
|
#define CONFIG_ESP32_WIFI_TX_BA_WIN CONFIG_ESP_WIFI_TX_BA_WIN
|
|
#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE CONFIG_ESP_WIFI_TX_BUFFER_TYPE
|
|
#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
|
|
#define CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
|
|
#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
|
|
#define CONFIG_ESP_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
|
|
#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
|
|
#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
|
|
#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
|
|
#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
|
|
#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
|
|
#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
|
|
#define CONFIG_LOG_BOOTLOADER_LEVEL CONFIG_BOOTLOADER_LOG_LEVEL
|
|
#define CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE
|
|
#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
|
|
#define CONFIG_MONITOR_BAUD CONFIG_ESPTOOLPY_MONITOR_BAUD
|
|
#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
|
|
#define CONFIG_OPTIMIZATION_ASSERTION_LEVEL CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL
|
|
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEBUG
|
|
#define CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP
|
|
#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
|
|
#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
|
|
#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
|
|
#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
|
|
#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
|
|
#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
|
|
#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
|
|
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
|
|
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
|
|
#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
|
|
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
|
|
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
|
|
#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
|
|
#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
|
|
#define CONFIG_TCPIP_TASK_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY
|
|
#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY
|
|
#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
|
|
#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
|
|
#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
|
|
#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
|
|
#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
|
|
#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
|
|
#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
|
|
#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
|
|
#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
|
|
#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
|
|
#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
|
|
#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
|
|
#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
|
|
#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
|
|
#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
|
|
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
|
|
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
|